CURRENT VERSION: 6.032 VERSION of THE SOURCE FILES: Label v6_032 in CVS Version branching: 6.000 QM acceptance test | \ 6.001 \ Clean-up before code review | \ 6.002 \ Corrections after clean-up (but, there is still a bug in the grating code) | \ | 6.003 Chopper move of amplitude zero are accepted | | | 6.004 Simulation version (chopper and grating are simulated) | | | 6.005 Bug corrected in chopper simulation | 6.006 Cleaned-up and no known bug, ready for FM acceptance | 6.007 Corrected bug in CS code (due to previous cleaning) | 6.008 Corrected bug in Seq.c (due to previous cleaning) | 6.009 Various corrections | 6.010 Various corrections (delivered to MPE to go on QM) | 6.011 Introduced checksum in hk packet | 6.012 Updated checksum computation | 6.013 Introduced a filter in the grating controller | 6.014 Updated grating open-loop and added position limit error in chopper (used at DMC FM acceptance) | 6.015 Updated chopper controller (position limit + enable) (built in Garching during chopper controller tests) | 6.016 Corrected bugs in chopper open-loop [SPR-0684] | 6.017 Corrected a bug introduced in chopper closed-loop activation during previous release. | 6.018 Updated FW controller, added Chopper field plate lookup-tables | 6.019 Changed divisor for chopper filter parameters from 1000 to 1000000 to be compatible with the SUM 4.3 | 6.020 Updated some of the grating trigger commands + new default parameters for chopper and grating | \ \ | \ 6.021 EMC test version. | \ | 6.022 Memory management test version. | 6.023 Added a filter to grating controller output, bug corrected in chopper controller, dump addresses updated | 6.024 Added the chopper QM field plates LUT | 6.025 4 SPR-SCR corrections | 6.026 Simulation mode for CS and FW | 6.027 Mechanisms move are now again triggered by the shifted sync | \ | 6.028 Test software to diagnose sampling of FPGA status register | 6.029 Grating can be moved absolute in simulation mode | 6.030 EDAC testing code + DEC FPGA master reset in DMC_SET_PAR_BOTH_SPEC | 6.031 Updated DEC FPGA master reset strategy and EDAC testing code | 6.032 Updated DEC FPGA master reset strategy | 6.033 No more SMCS reset after the DEC FPGA reset, the auto-reconnect should be enough | 6.034 Reduced wait time after the DEC FPGA reset HISTORY: ******* 29/09/10 0x00006034 - After the master reset, reduced the wait time from 100ms to 25ms. Then, the time needed to detect the 1355 reconnection has been reduced too. 23/09/10 0x00006033 - No more SMCS reset after the DEC FPGA reset, the auto reconnect should handle it. If the communication is not recovered within 250ms, a new master reset is performed. If the third master reset fails, an error is raised: ERR_DEC_CONTROLLER_NO_RAMP_AFTER_RESET 22/09/10 0x00006032 - Update DEC FPGA master reset: after the reset of the FPGA and the reset of the SMCS, we wait 600ms before trying to re-establish the 1355 link. This delay is required for the TaskStatus to be updated by the SMCS drivers. In the previous 2 versions, the TasksStatus were not updated fast enough so, the SET_PARAM_BOTH did continue as if the 1355 communication was already recovered, it could send the first parameter to the DEC, then, the communication was actually lost by the SMCS reset, then, after a few hundred milliseconds (not the same delay for blue and red DEC), the communication was recovered and the remaining 5 parameters were sent to the DEC FPGA. 21/09/10 0x00006031 - Updated EDAC DRAM test code. The test code for DRAM was actually optimized by the compiler and the EDAC was not exercised. - Updated EDAC PRAM test code. We now use an address that is inside the usefull code. - Update DEC FPGA master reset: after the reset, the parameters are sent to the DEC only at the beginning of a ramp. 16/09/10 0x00006030 - Enabled the EDAC checking for DM and PM at startup. - Introduced a DEC FPGA master in DMC_SET_PAR_BOTH_SPEC. The DEC parameters are rewritten directly after the reset such that the CRE remains ON - Introduced test code for the EDAC in DMC_SELECT_MECH_CTRL_MODE to be able to recreate EDAC failures and test the reaction of the software. 23/04/09 0x00006029 - In grating simulation mode, it is now possible to make absolute move since the DMC_HOME_GRAT command is also simulated. 10/11/08 0x00006028 - Test software where the ISR is replaced by a dummy ISR that is sampling the FPGA status register 5 times over 30µs 06/11/08 0x00006027 - [SPR-1145]: Mechanisms move are now triggered by the shifted sync (bug introduced in SCR-1068) 09/10/08 0x00006026 - [SCR-1072]: Added a simulation mode for the filter wheels - [SCR-1074]: Added a simulation mode for the calibration sources - [SCR-1066] update: moved the DMC_WRT_GRAT_MAX_POWER command - [SCR-1068] update: moved the DMC_SYNC_COUNT hk entry 07/10/08 0x00006025 - [SPR-1065]: Red SPU transmission mode is now copied in the red photo header - [SCR-1066]: Grating power limit default value is now 150mA and it can be modified through the new DMC_WRT_GRAT_MAX_POWER command - [SCR-1067]: New parameters value for DMC_SYNCHRONIZE_ON_DET to be able to move the mechanisms with or without synchro - [SCR-1068]: Added a new synchro counter in the nominal HK (replacing DMC_BOLC_REC_PAC) 28/07/08 0x00006024 - [SCR-1069]: Added the chopper QM field plates LUT. They can be selected with values 2 & 3 of the SelectFieldPlateLUT 07/06/08 0x00006023 - Added filter for the grating output => Added DMC_WRT_GRAT_CONF_FILT command - [SPR-0890]: corrected (unexpected peak at chopper enable) - [SPR-0781]: added some code in params.c to fill the dump addresses. 19/12/07 0x00006022 - Memory management test version. This version is identical to 0x00006020 except for the version number that has changed 03/07/07 0x00006021 - EMC version. Some blue pixels are available in diag hk. 28/06/07 0x00006020 - [SPR-0735] In some of the grating trigger commands, the check on the status of the controller was performed on the TaskStatus variable (that is updated every 2 seconds in the nominal hk) while it should have been peformed on the PidStatus (that is updated at 8KHz in the ISR). This has been corrected. Affected Commands: - DMC_MOVE_GRAT_ABS (when checking that a homing has been performed before the move) - DMC_ENTER_GRAT_CONT_DEG (when checking that the controller is disabled) - DMC_LOCK_GRAT (when checking that the controller is disabled) - DMC_UNLOCK_GRAT (when checking that the controller is disabled) - Chopper parameters have new default values: Kp 0x000683F8 Ki 0x018392C0 Kd 0x00000032 Kf 0x00000898 Rate 0x0000024A AccumLimit 0x3FFFFFFF OutputLimit 0x000069DC PosLimit 0x000061A8 ErrorLimit 0x7FFFFFFF PosOffset 0xFFFFFB55 KiCurr 0x000468E8 SelectFieldPlateLUT 0x00000000 Spare 0x00000000 FilterN1 0x00018AAF FilterN2 0x00029F4D FilterN3 0x00018AAF FilterD1 0x001C11DF FilterD2 0x000DBB35 Inductance 0x00000094 Resistance 0x0000393A ControlLoopGain 0x000003B1 - Grating parameters have new default values: Kp = 2000; Ki = 50000; Kd = 18; Kf = 0; //Kf is now the Derivate filter order Rate = 12; AccumulatorLimit = 17711889; OutputLimit = 17711; Scaling = 1398; ErrorLimit = 23302; Range = 0x100000; HallSensorsOffset = 4230; InductosynExcitationAmplitude = 1200; 09/06/07 0x00006019 - Chopper filter parameters N1, N2, N3, D1, D2 were divided by 1000 and they should have been divided by 1000000. It is now correct. 07/06/07 0x00006018 - Added new threshold parameters for the FW. The FW_MOVE_TO_LOC command also accep new parameters to specify the direction of the move - In the commands FW_MOVE_TO_LOC, the fw is now commanded to turn 1.5 turn (instead of 1) and to stop when it reaches the sensor threshold. In this case, if the threshold are not set correctly, the FW will move to the opposite location anyway. - Added the field plate lookup tables to linearize their output. The PosMultiplier is now used to select the LUT: 0 = nominal 1 = redundant other = no LUT 27/02/07 0x00006017 - The correction of the SPR-0684 had a bug I'm was not looking at the right variable to know if the controller was enabled or not. I was checking in the TaskStatus while I should check in the PidStatus ! TaskStatus is updated by the HK task and the information in this word is therefore updated only every 2 seconds. Since the controller was already enabled for 2 seconds at the time I start writing in the DAC, the controller had already accumulated a 'big' output and this causes a peak in the chopper position. We know check the PidStatus instead of the TaskStatus. 26/02/07 0x00006016 - [SPR-0684] The chopper DAC is commanded zero when the controller is not enabled. In the enable chopper controller command, the cur_pos is copied in the setoint only in closed-loop. In open-loop, the setpoint is set to zero. 22/02/07 0x00006015 - [SPR-0681] At the chopper controller enable, the setpoint and target are assigned the current position to avoid a step transition at the time of the enable. The 'previous pos' that is used to compute the speed of the chopper is also assigned the current position to avoid big derivatives effects due to a wrong calculation of the speed. - [SPR-0681] The position of the chopper is now stored in the housekeeping before the position is compared to the position limit. This way, we are sure that we will always have the position in the housekeeping. 07/02/07 0x00006014 - The open loop code for the grating has been updated and validated on DMC FM with QM grating - The position limit error is now signaled in the chopper controller (error code 0x0b15). The position limit is stored in the field 'scaling' of the chopper pid controller. Its default value is 0x7FFFFFFF. 12/01/07 0x00006013 - Introduced a filter on the speed in the grating controller. The filter order is stored in Kf (0 means no filter) 13/12/06 0x00006012 - Updated the checksum computation to be compatible with DPU computation 11/12/06 0x00006011 -The command DMC_FW_GR_DAC_OUT used only for calibration on ground has been modified to be able to command both DACs separately. 16MSB commands DAC1 and 16lsb commands DAC2. - Introduced a checksum in the DMC HK packet 30/11/06 0x00006010 - The grating open-loop code has been updated with the following changes: -- when computing the initial position in the sine array in the 'enter degraded mode' command, we are now applying the hall sensors offset to have a more accurate computation. -- the amplifier output is no more inverted -- the phase A and phase B output have been swapped (phase B is now sin(curPos)) -- the shift between phase has been inverted (phase A is now sin(curPos+90°)) - Additionnal cleaning due to the change of master reset philosophy. A semaphore was still signaled while no tasks were listening to it. It has been removed. (Everything related to SignalWhenReceivingSecondToLastReadout has been removed) - All error from packet encoders (blue and red) were signaled in the blue packet encoder status. This is now solved (the GenereSpectroPacketHeader function now takes an additional parameter that is a pointer to the packet encoder were the error must be signaled). - [SPR-0651] When doing a switch-on of a fw, the grating controller was marked as OFF but was not disabled ! This caused some problem while switching-on the grating controller later (it was then enabled immediately !). In the CommandSwitchOnFwSpec and CommandSwitchOnFwPhoto, the instruction CLEAR_BIT(gpGratingPidController->TaskStatus, K_BMASK_PID_CTRL_STATUS_POWER_ON) has been replaced by DisableGratingController() (there is actually no need to switch-off the grating controller since, in this case, we will lose the position) - Changed the size of DMC_TIME_1 and DMC_TIME_2. DMC_TIME_1 is now 32bits and DMC_TIME_2 is now 16bits. This only affects the content of diagnostic housekeeping packets if DMC_TIME_1 or DMC_TIME_2 are monitored in the hk diag list. 23/08/06 0x00006009 - In the command SetTimingFpgaParameters, all the bits that are not accessible through the command (K_BMASK_TIMING_ACCESSIBLE_BITS) were reset to zero. This could have an impact on the current polarity in the Temperature sensors, and on the grating/fw housekeepings It has now been replaced by SET_BITS(gpFPGA->ControlRegister, K_BMASK_TIMING_ACCESSIBLE_BITS, gpFPGA->TemporaryControlRegister) - In Hk.c, to avoid to receive lots of packets if there has been a long time between the previous packet and the current one (this can happen, if the CPU load has reached 100%, ...), the semaphore is reset at every packet. It is therefore not accumulating packet requests anymore KS_SemaReset(SEMA_TIMER_HOUSEKEEPING_GENERAL); - In the hk list, DMC_GR_LL1_CUR and DMC_GR_LL2_CUR were inverted. This is now corrected - In the command list, updated the 'mode availability' of some commands that was obsolete (heater/flasher were IN_TEST instead of TRIG) 22/08/06 0x00006008 One bug corrected in Seq.c - Modified SequencerSendNack command such that it sends NACK if a sequence is being executed. This problem appeared during code cleaning 19/08/06 0x00006007 Two bugs corrected in the CS code - Pid_ctrl.h: During code cleaning, we had removed one member in the CsController structure (SignalType) but, we forgot to update the offset definition that was used by the assembly code. The impact was that all the measures performed by MIM1 were offset by 1 position => the computation of the resistor value was not correct. - CsCtrl1.c During code cleaning, the compilation flag NEW_CAL_SRC definition had been removed but it was still used in this file. I have now removed the conditional compilation here. The impact was that the diagnostic hk for the calibration source was not correct (it had to be divided by 256 and it was not => overflow => meaningless value) Other modifications - chopgrat.s replaced all // by C comments style - hkList.h the custom hk entries are now pointing on CS data 14/08/06 0x00006006 This version is derived from 0x00006002 Chopper move of amplitude zero are accepted. The grating bug introduced during code cleaning has been solved. MPE and CPATEC recommandations implemented (code cleaning) 26/04/06 0x00006005 This version is derived from 0x00006004 Bug in the chopper simulation has been corrected 25/04/06 0x00006004 This version is derived from 0x00006003 - chopper setpoint is copied into chopper position - grating setpoint is copied into grating position - grating homing command is immediate, the bit HOMING_COMPLETE is set and the setpoint is set to 500000. 05/04/06 0x00006003 This version is derived from the 0x00006000 Chopper move of amplitude zero are accepted. 04/04/06 0x00006002 This version is derived from 0x00006001 During the clean-up of the code, the number of interrupts the grating has to stay on the hard stop had changed. It now has its old value. 27/03/06 0x00006001 This version is derived from 0x00006000 - The source code has been cleaned, commented. - Some of the variables have been renamed to be in accordance with the naming conventions defined in DDD. - Some parts of code have been re-organized without affecting the functionality or performance - Simplified PID controller for chopper has been removed (it was not used) - In the case the amplitude of a move of the chopper was 0, DMC was returning a NACK. It is now returning a PACK Bugs found and corrected during internal code review: - The diagnostic HK list was not empty at startup. It is now. - In previous version, only the 8lsb of the trigger command ID were considered. It meant that, if you send command 257, the command 1 was executed. All bits are now considered. - If a command was rejected inside a sequence, a NACK was sent. No ACK or NACK shall be sent during sequence execution 15/01/06 0x00006000 This version should only be used only with QM and FM DMC GRATING: - New code to handle both launch lock motors. Parameters of the LOCK_GRATING and UNLOCK_GRATING have been changed ! - Removed the detection and correction of MIM FPGA bug in the inductosyn readout (jumps in the readout) since it has been corrected in the FPGA. - Software adapted to handle the inductosyn amplitude tuning. - Removed the inductosyn inversion that is not required anymore for FM grating - the grating controller is disabled when we loose the connection with DPU CHOPPER: - The chopper trajectory generator now implements a sine transition instead of a ramp. - Commanding units of chopper has changed (it is now the same as the position unit) - when switching-off chopper, the coil relays are set back to nominal position - parameters of set_chopper_coil_drive_mode have changed - default accumulator limit is now 0x3FFFFFFF - the chopper controller is switched-off when we loose the connection with DPU DEC: - The DEC master reset is now done when switching-on any of the DEC and is not done any more when sending the params to both DECs. - Paremeters are now send after we have received the destructive readout (so, the next ramp will have the old parameters and the next one will have the new ones) - Removed the 1ms interval between the sending of two individual parameters to DEC (we have corrected the related bug in the DEC fpga). - When writing to DEC cre_ctrl_reg, a new mask is applied: K_BMASK_DEC_COMMAND_WRITABLE_BITS = 0x00003FFE (this means that CRE ON/OFF, Heater ON/OFF and Flasher ON/OFF are not accessible through the write command) - SPR-0434 (SetParam_both switches off blue detector heater) corrected - Added commands to handler heaters and flashers - If the DEC parameters contain a number of readout per ramp < 2, the set_param command is rejected - In the DEC supply HK, SUB current has been replaced by GND current TIMING: - We now have 6 wait states when accessing MIM FPGA registers - When writing to timing fpga control_register, a new mask is applied: K_BMASK_TIMING_ACCESSIBLE_BITS = 0x001E003A (all the other bits are no more accessible through the write command) - The synchro source selection is now only accessible through trigger command - The default timing parameters have been modified OTHERS: - SPR-0344 When changing the hk diag list, the next diag hk packets do not contain old values anymore at its beginning. - Implemented the CHECK in EEPROM command - FIFO of packet encoders are purged when they are not transmitting to SPU to avoid accumulation of packets. - Note concerning the division bug in mathematic libraries: The interrupt routines of DMC OBSW do not use r6, r7, r9 and r11 that are used in the division functions. And the OBSW only use float divisions. 06/05/05 0x00005025 Default parameters for grating and chopper are now for cold QM. 28/04/05 0x00005024 The grating Scaling was incorrect (still the cold value). It now contains the warm value (2048) SPR-0250 The SWOFF_SPECTRO_ARRAY commands are now always accepted (no NACK are produced) SPR-0285 The grating following error is now signaled in the GRAT_CTRL_ST and in the DMC_SW_GLOBAL_ST SPR-0286 The grating power limit error is now signaled in the GRAT_CTRL_ST and in the DMC_SW_GLOBAL_ST The DMC_SW_GLOBAL_ST is now updated after the nominal hk acquisition to include the error generated during the hk acquisition SPR-0287 The grating homing has been modified: The criteria to consider that the homing is complete is now "max output during 0.6s" instead of "following error > 3 deg". We are now able to detect following errors during homing. 03/12/04 0x00005023 Same as 0x00005022 except for grating and chopper default parameters that are set to QM warm 02/12/04 0x00005022 Back to STM parameters for grating and chopper Rebuilt the code to suppress a bug that was in 0x5020 where it was not possible to write the fpga parameters 02/12/04 0x00005021 Back to QM parameters for grating and chopper 23/11/04 0x00005020 Grating homing procedure modified: only the inductosyn period counter is reset (absolute pos inside a phase is kept as is) When grating following error is detected, the controller is disabled (except during homing) When grating controller output is bigger than 100mA for more than 5 seconds, the controller is disabled Changed the grating controller default parameters (only the error limit has changed to 0x5b06) New hk entries 512 513 514 515 29/10/04 0x00005019 There was a bug in the new CAL SRC ctrl. If it was started more than 20 seconds after the switch-on of the DMC. It is now corrected 29/10/04 0x00005018 Changed Hk Entry 419. Changed the size of the CS parameter block to 7. When an ABORT_SEQUENCE is received, the next command in the sequence was executed anyway. This is now corrected When moving a FW to a location, if the location is not reached, the filter wheel stops after a complete turn (it was 64 turns). Inverted the sign of the output of the FW controllers to avoid the oscillation at the beginning of a move. Changed the calibration source to improve the accuracy. Set new default parameters for chopper and grating 08/10/04 0x00005017 Introduced a 1ms delay between all the commands sent to the DEC (in set_param commands) Removed the patch to hide the DEC FPGA bugs. 08/09/04 0x00005016 New code for the calibration source to improve the accuracy (note this code is currently disabled because it was not tested completely so they are actually no difference between 5016 and 5015). 07/09/04 0x00005015 Wait at starttime back to 6 sec New diag hk to monitor spectro pixels 02/09/04 0x00005014 Modified the 'set param both' procedure. 31/08/04 0x00005013 Added the grating open loop mode. Updated the Cal Src to work with the new Cal Src board Updated Diag Hk related to Cal Src Reduced the wait at starttime to 1sec 06/08/04 0x00005012 Changed the version numbering scheme. Added a move to central position after the grating homing. Changed the length of temperature sensors hk to 2 bytes. 22/07/04 0x05000101 The DEC FPGA bug masking was masking CRECR, CRCRMP, and the ramp counter. It was not masking the bug on RRR. Now it is done. 21/07/04 0x05000100 The custom hk entry 8 is now looking at DMPSC interrupt register value. The DEC temperature sensors unit is now ohms. 20/07/04 0x05000009 The last entry of the custom hk table now look at the last SMCS ISR register value. 20/07/04 0x05000008 All parameters of the chopper controller are now configurable by command (We now have 21 parameters instead of 10). CustomHK entries are (in this version only ?) looking at science data from DEC. The first 4 entries are looking at words n°0-16-32-48 of the Blue DEC packet The next 4 entries are looking at words n°0-16-32-48 of the Red DEC packet The last 2 entries look at the total number of interrupt of SMCS2 and the number of interrupt that are handled. The FPU temperature sensors unit is now ohms. 20/07/04 0x05000007 : Set the usefull size of DMC_FWGRAT_HALL_A and DMC_FWGRAT_HALL_B back to 2 bytes (it was 4) (SPR-0132). Regenerated the complete list of hk such that it matches the SUM Introduced the open-loop for chopper (new parameter to SET_CHOPPER_COIL_DRIVE_MODE command) The chopper parameter block now contains the default value to operate the chopper at 4K. 23/06/04 0x05000006 : removed the sticky 'HOMING_COMPLETED' bit in GRAT_CTRL_ST removed the sticky 'SEARCHING_POS_A/B' bit in FW_CTRL_ST 21/06/04 0x05000005 : added the notch filter to the chopper controller added the detection for overflow of inductosyn period counter in FPGA 19/06/04 0x05000004 : now configure the smcs 2 only to autoreconnect. 18/06/04 0x05000003 : reduced wait time at startup to 6 sec (it was 10) 18/06/04 0x05000002 : perform the configure nominal after the chip reset (not after the 15 sec) and removed the autoreconnect for smcs1 & 2 (it was supposed to be done for chip 2 but was actually done for chip 1 !!!). 18/06/04 0x05000001 : advanced the chip reset directly after start-up. During connection retry, moved the start link after 9 sec (it was immediately after the disconnect has been detected) 14/06/04 0x05000000 : EM delivery version