/************************************************************************* $Archive: /PACS/OnBoard/m_smcsin.h $ $Revision: 1.10 $ $Date: 2009/04/23 13:51:12 $ $Author: amazy $ $Log: m_smcsin.h,v $ Revision 1.10 2009/04/23 13:51:12 amazy 6.029 * * 4 28/08/02 11:49 Amazy * Added the header with the history log *************************************************************************/ /***************************************************************************** * * Project name: Herschel PACS DEC-MEC * Product name: DM_LLDRV * Object name: m_smcsin * Filename: %M% * Language: C (ADSP-21020) * Compiler: G21K - r3.3 * Company: CRISA * Author: F. Torrero * Version: %I% * Creation date: 25/Mar/2002 * Last Modification date: %G% * * Description =============================================================== * * This module implements SMCS sub-interrupts management functions for two * SMCS chips * * Change log =============================================================== * * | DATE | NEW VERSION | AUTHOR | REASON FOR CHANGE | * =========================================================================== * * 25/Mar/02 1 F.Torrero Creation * * ****************************************************************************/ #ifndef M_SMCSIN_H #define M_SMCSIN_H /***************************************************************************** INCLUDES *****************************************************************************/ #include "l_gendef.h" /***************************************************************************** PROVIDED CONSTANTS *****************************************************************************/ /* Bit positions within ISR register */ #define K_BPOS_SMCSINT_CH1_PAR_DIS_ERR 0 #define K_BPOS_SMCSINT_CH1_ERROR 1 #define K_BPOS_SMCSINT_CH1_DATA_TXED 2 #define K_BPOS_SMCSINT_CH1_DATA_RXED 3 #define K_BPOS_SMCSINT_CH1_EOP_RXED 4 #define K_BPOS_SMCSINT_CH1_RSTCOM_RXED 5 #define K_BPOS_SMCSINT_CH1_TXFIFOEMPTY 6 #define K_BPOS_SMCSINT_CH1_TXFIFOFULL 7 #define K_BPOS_SMCSINT_CH1_RXFIFONOTEM 8 #define K_BPOS_SMCSINT_CH1_RXFIFOFULL 9 #define K_BPOS_SMCSINT_CH2_PAR_DIS_ERR 10 #define K_BPOS_SMCSINT_CH2_ERROR 11 #define K_BPOS_SMCSINT_CH2_DATA_TXED 12 #define K_BPOS_SMCSINT_CH2_DATA_RXED 13 #define K_BPOS_SMCSINT_CH2_EOP_RXED 14 #define K_BPOS_SMCSINT_CH2_RSTCOM_RXED 15 #define K_BPOS_SMCSINT_CH2_TXFIFOEMPTY 16 #define K_BPOS_SMCSINT_CH2_TXFIFOFULL 17 #define K_BPOS_SMCSINT_CH2_RXFIFONOTEM 18 #define K_BPOS_SMCSINT_CH2_RXFIFOFULL 19 #define K_BPOS_SMCSINT_CH3_PAR_DIS_ERR 20 #define K_BPOS_SMCSINT_CH3_ERROR 21 #define K_BPOS_SMCSINT_CH3_DATA_TXED 22 #define K_BPOS_SMCSINT_CH3_DATA_RXED 23 #define K_BPOS_SMCSINT_CH3_EOP_RXED 24 #define K_BPOS_SMCSINT_CH3_RSTCOM_RXED 25 #define K_BPOS_SMCSINT_CH3_TXFIFOEMPTY 26 #define K_BPOS_SMCSINT_CH3_TXFIFOFULL 27 #define K_BPOS_SMCSINT_CH3_RXFIFONOTEM 28 #define K_BPOS_SMCSINT_CH3_RXFIFOFULL 29 #define K_BPOS_SMCSINT_CH4_PAR_DIS_ERR 0 #define K_BPOS_SMCSINT_CH4_ERROR 1 #define K_BPOS_SMCSINT_CH4_DATA_TXED 2 #define K_BPOS_SMCSINT_CH4_DATA_RXED 3 #define K_BPOS_SMCSINT_CH4_EOP_RXED 4 #define K_BPOS_SMCSINT_CH4_RSTCOM_RXED 5 #define K_BPOS_SMCSINT_CH4_TXFIFOEMPTY 6 #define K_BPOS_SMCSINT_CH4_TXFIFOFULL 7 #define K_BPOS_SMCSINT_CH4_RXFIFONOTEM 8 #define K_BPOS_SMCSINT_CH4_RXFIFOFULL 9 #define K_BPOS_SMCSINT_CH5_PAR_DIS_ERR 10 #define K_BPOS_SMCSINT_CH5_ERROR 11 #define K_BPOS_SMCSINT_CH5_DATA_TXED 12 #define K_BPOS_SMCSINT_CH5_DATA_RXED 13 #define K_BPOS_SMCSINT_CH5_EOP_RXED 14 #define K_BPOS_SMCSINT_CH5_RSTCOM_RXED 15 #define K_BPOS_SMCSINT_CH5_TXFIFOEMPTY 16 #define K_BPOS_SMCSINT_CH5_TXFIFOFULL 17 #define K_BPOS_SMCSINT_CH5_RXFIFONOTEM 18 #define K_BPOS_SMCSINT_CH5_RXFIFOFULL 19 #define K_BPOS_SMCSINT_CH6_PAR_DIS_ERR 20 #define K_BPOS_SMCSINT_CH6_ERROR 21 #define K_BPOS_SMCSINT_CH6_DATA_TXED 22 #define K_BPOS_SMCSINT_CH6_DATA_RXED 23 #define K_BPOS_SMCSINT_CH6_EOP_RXED 24 #define K_BPOS_SMCSINT_CH6_RSTCOM_RXED 25 #define K_BPOS_SMCSINT_CH6_TXFIFOEMPTY 26 #define K_BPOS_SMCSINT_CH6_TXFIFOFULL 27 #define K_BPOS_SMCSINT_CH6_RXFIFONOTEM 28 #define K_BPOS_SMCSINT_CH6_RXFIFOFULL 29 /* Bit masks for ISR register */ #define K_BMASK_SMCSINT_CH1_PAR_DIS_ERR 0x1 #define K_BMASK_SMCSINT_CH1_ERROR 0x2 #define K_BMASK_SMCSINT_CH1_DATA_TXED 0x4 #define K_BMASK_SMCSINT_CH1_DATA_RXED 0x8 #define K_BMASK_SMCSINT_CH1_EOP_RXED 0x10 #define K_BMASK_SMCSINT_CH1_RSTCOM_RXED 0x20 #define K_BMASK_SMCSINT_CH1_TXFIFOEMPTY 0x40 #define K_BMASK_SMCSINT_CH1_TXFIFOFULL 0x80 #define K_BMASK_SMCSINT_CH1_RXFIFONOTEM 0x100 #define K_BMASK_SMCSINT_CH1_RXFIFOFULL 0x200 #define K_BMASK_SMCSINT_CH2_PAR_DIS_ERR 0x400 #define K_BMASK_SMCSINT_CH2_ERROR 0x800 #define K_BMASK_SMCSINT_CH2_DATA_TXED 0x1000 #define K_BMASK_SMCSINT_CH2_DATA_RXED 0x2000 #define K_BMASK_SMCSINT_CH2_EOP_RXED 0x4000 #define K_BMASK_SMCSINT_CH2_RSTCOM_RXED 0x8000 #define K_BMASK_SMCSINT_CH2_TXFIFOEMPTY 0x10000 #define K_BMASK_SMCSINT_CH2_TXFIFOFULL 0x20000 #define K_BMASK_SMCSINT_CH2_RXFIFONOTEM 0x40000 #define K_BMASK_SMCSINT_CH2_RXFIFOFULL 0x80000 #define K_BMASK_SMCSINT_CH3_PAR_DIS_ERR 0x100000 #define K_BMASK_SMCSINT_CH3_ERROR 0x200000 #define K_BMASK_SMCSINT_CH3_DATA_TXED 0x400000 #define K_BMASK_SMCSINT_CH3_DATA_RXED 0x800000 #define K_BMASK_SMCSINT_CH3_EOP_RXED 0x1000000 #define K_BMASK_SMCSINT_CH3_RSTCOM_RXED 0x2000000 #define K_BMASK_SMCSINT_CH3_TXFIFOEMPTY 0x4000000 #define K_BMASK_SMCSINT_CH3_TXFIFOFULL 0x8000000 #define K_BMASK_SMCSINT_CH3_RXFIFONOTEM 0x10000000 #define K_BMASK_SMCSINT_CH3_RXFIFOFULL 0x20000000 #define K_BMASK_SMCSINT_CH4_PAR_DIS_ERR 0x1 #define K_BMASK_SMCSINT_CH4_ERROR 0x2 #define K_BMASK_SMCSINT_CH4_DATA_TXED 0x4 #define K_BMASK_SMCSINT_CH4_DATA_RXED 0x8 #define K_BMASK_SMCSINT_CH4_EOP_RXED 0x10 #define K_BMASK_SMCSINT_CH4_RSTCOM_RXED 0x20 #define K_BMASK_SMCSINT_CH4_TXFIFOEMPTY 0x40 #define K_BMASK_SMCSINT_CH4_TXFIFOFULL 0x80 #define K_BMASK_SMCSINT_CH4_RXFIFONOTEM 0x100 #define K_BMASK_SMCSINT_CH4_RXFIFOFULL 0x200 #define K_BMASK_SMCSINT_CH5_PAR_DIS_ERR 0x400 #define K_BMASK_SMCSINT_CH5_ERROR 0x800 #define K_BMASK_SMCSINT_CH5_DATA_TXED 0x1000 #define K_BMASK_SMCSINT_CH5_DATA_RXED 0x2000 #define K_BMASK_SMCSINT_CH5_EOP_RXED 0x4000 #define K_BMASK_SMCSINT_CH5_RSTCOM_RXED 0x8000 #define K_BMASK_SMCSINT_CH5_TXFIFOEMPTY 0x10000 #define K_BMASK_SMCSINT_CH5_TXFIFOFULL 0x20000 #define K_BMASK_SMCSINT_CH5_RXFIFONOTEM 0x40000 #define K_BMASK_SMCSINT_CH5_RXFIFOFULL 0x80000 #define K_BMASK_SMCSINT_CH6_PAR_DIS_ERR 0x100000 #define K_BMASK_SMCSINT_CH6_ERROR 0x200000 #define K_BMASK_SMCSINT_CH6_DATA_TXED 0x400000 #define K_BMASK_SMCSINT_CH6_DATA_RXED 0x800000 #define K_BMASK_SMCSINT_CH6_EOP_RXED 0x1000000 #define K_BMASK_SMCSINT_CH6_RSTCOM_RXED 0x2000000 #define K_BMASK_SMCSINT_CH6_TXFIFOEMPTY 0x4000000 #define K_BMASK_SMCSINT_CH6_TXFIFOFULL 0x8000000 #define K_BMASK_SMCSINT_CH6_RXFIFONOTEM 0x10000000 #define K_BMASK_SMCSINT_CH6_RXFIFOFULL 0x20000000 #define K_BMASK_SMCSINT_ALL 0x3FFFFFFF /***************************************************************************** PROVIDED TYPES *****************************************************************************/ /***************************************************************************** PROVIDED VARIABLES *****************************************************************************/ /***************************************************************************** DECLARATION OF PROVIDED FUNCTIONS *****************************************************************************/ #ifndef INCLUDE_DEFINE_ONLY T_SR DSMCS_MaskUnmaskSMCSSubInt(T_UNSIGNED_32 SMCSChip, T_UNSIGNED_32 InterruptBitMask, T_UNSIGNED_32 MaskUnmaskFlag); T_SR DSMCS_GetSMCSIMR(T_UNSIGNED_32 SMCSChip, T_UNSIGNED_32 *InterruptMaskRegValue); T_SR DSMCS_GetSMCSIPR(T_UNSIGNED_32 SMCSChip, T_UNSIGNED_32 *InterruptPendingRegValue); T_SR DSMCS_ClearSMCSIPR(T_UNSIGNED_32 SMCSChip); #endif //INCLUDE_DEFINE_ONLY #endif /* M_SMCSIN_H */